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                   B O S T O N   U N I V E R S I T Y
                                       
                      Computer Science Department
                                       
                          C O L L O Q U I U M

            Hot Pages: Software Caching for Raw Microprocessors

                          Csaba Andras Moritz
                     Laboratory for Computer Science	     
                                 MIT

 			  Friday,  March 17
			      11:00 AM
                       (Coffee served at 10:45AM)

                                       
                         Seminar Room / MCS 135
                                       



    I will present a software-only solution for managing on-chip data on
    the MIT Raw Machine, a software exposed, parallel
    microprocessor architecture.  Raw achieves high performance by
    replicating a very simple hardware structure, providing low latency
    processor-to-processor communication, and extracting instruction level
    parallelism (ILP) at compile-time.  Because the hardware structure is
    simple, a Raw processor can achieve high clock rates.

    A Raw system is typically composed of a Raw chip connected to external
    DRAM memory.  In order to run applications with large problem sizes
    (larger than on-chip memory) the software must transparently manage
    the mapping between the program address space and available on-chip
    memory.  Because virtualization is handled in software rather than
    hardware, the system is easier to design and test, it is more 
    predictable, and provides flexibility for new or changed features.

    The challenge of a software based approach to virtualization is to
    balance the tradeoffs between the added software overheads against
    opportunities provided by a memory management scheme specialized for
    each application.  Our technique, called {Hot Pages}, combines
    both compile-time and runtime techniques to provide completely
    transparent virtualization.  It reduces the software overheads by
    selectively virtualizing memory references, by optimizing the software 
    handler for the hit case, and by register promoting
    translated virtual page descriptions likely to be reused for nearby
    memory references.  Besides lowering software overheads, this solution
    provides opportunities for further optimizations as it can potentially
    mask the overhead of more sophisticated memory management schemes. I
    present simulation results for a variety of applications running with
    Hot Pages on a prototype Raw system.

    Host:  Azer Bestavros (best@cs.bu.edu)

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