Subject: IEEE-CS TC-RTS Newsletter for Fri Apr 19, 1996 _______________________________________________________________________________ __ _ __ ___ ___ __ __ I E E E Technical Committee |\ | |_ | | (_' | |_ | | |_ |_) C S on Real-Time Systems | \| |__ |/\| ,_) |__ |__ | | |__ | \ _______________________________________________________________________________ Table of Contents Line ----------------- ---- 1. best@cs.bu.edu (Azer Bestavros) (148 lines) Editorial policy regarding conference announcements................ 3 CFP: 17th IEEE Real-Time Systems Symposium......................... 33 2. oulusoy@cs.bilkent.edu.tr (Ozgur Ulusoy) (39 lines) Special Issue on REAL-TIME DATABASE SYSTEMS........................ 151 3. segala@cs.unibo.it (Roberto Segala) (125 lines) PhD thesis available on Randomized Distributed Real-Time Systems... 189 4. cpg@cs.utexas.edu (Carlos Puchol) (49 lines) TempEst v1.2 is now available...................................... 315 5. heitmeye@itd.nrl.navy.mil (Connie Heitmeyer) (115 lines) New Book: Formal Methods for Real-Time Computing.................. 364 6. joanne@theory.lcs.mit.edu (Joanne Talbot) (18 lines) A new book announcement: Distributed Algorithms by Nancy Lynch..... 479 7. son@bbibbi.cs.virginia.edu (58 lines) Postdoctoral Research Position at University of Virginia........... 497 8. sleue@swen.uwaterloo.ca (Stefan Leue) (67 lines) Post Doc Position at the University of Waterloo.................... 554 9. Hans Hansson (37 lines) Announcement: VISITING RESEARCHER in REAL-TIME SYSTEMS............. 621 10. kfwong@se.cuhk.hk (Wong Kam-Fai) (215 lines) [Unspecified subject].............................................. 657 11. Time-96 Workshop (248 lines) TIME-96 Preliminary PROGRAM........................................ 874 12. iceccs96@homer.njit.edu (iceccs '96) (108 lines) RTAW96 Call for Papers............................................. 1122 13. Bernhard Reus (47 lines) AMAST'96: Call for Participation................................... 1229 14. srivas (142 lines) FMCAD'96: Call for Papers.......................................... 1277 15. mvac@rc.bel.alcatel.be (101 lines) CN3 Call for Participation......................................... 1419 ------------------------------------------------------------------------------ <<<<<<<<<<<<<<<<<<* START OF THE IEEE-CS TC-RTS NEWSLETTER *>>>>>>>>>>>>>>>>>> ------------------------------------------------------------------------------ Message 1; Postmarked Mon Apr 20 10:17:40 1996 From: best@cs.bu.edu (Azer Bestavros) Subject: Editorial policy regarding conference announcements Content-Length: 1189 Dear IEEE-CS TC-RTS Newsletter subscriber: Starting with this issue of the newsletter, conference and workshop announcements will be edited to exclude materials such as registration forms, local accomodations, etc. I have received a number of complaints regarding the length of the Newsletter, and the redundancy of sending such information via Email. Email as a communication medium is more efficient for notification purposes---to direct those interested to other outlets of archival nature, such as Web pages, etc. The only exception to this rule will be for conferences or workshops that are sponsored by the IEEE-CS TC-RTS. I appreciate your understanding and welcome your collaboration in drafting calls for papers and for participation that comply with the above stated goals. Thanks you, --Azer --------------------------------------------------------------------------- Prof A. Bestavros Dept of Computer Science, MCS 276 Work:617-353-9726 Boston University 111 Cummington st Boston MA 02215 Home:617-493-2823 Email:best@bu.edu Http://cs-www.bu.edu/faculty/best Fax :617-353-6457 --------------------------------------------------------------------------- Postmarked Mon Apr 15 14:17:40 1996 From: best@cs.bu.edu (Azer Bestavros) Subject: CFP: 17th IEEE Real-Time Systems Symposium Content-Length: 3735 RTSS'96 WWW page at http://cs-www.bu.edu/pub/ieee-rts/rtss96/ CALL FOR PAPERS 17th IEEE Real-Time Systems Symposium December 4-6, 1996 Washington. DC USA Sponsored by IEEE Computer Society TC on Real-Time systems SCOPE: The purpose of this symposium is to bring together researches and developers from academia, industry and government to advance the science and technolo- gy of real-time computing. Papers on all aspects of real-time computing are sought, including operating and scheduling, fault-tolerance, databases, pro- gramming languages, tools, communication networks, architectures, performance modeling, formal methods, case studies, and applications. Of particular in- terest are reports describing practical experiences and experimental results based on system building efforts, and real-time issues in applications such as avionics, multimedia, robotics, automated process control and manufactur- ing. SUBMISSIONS: Paper should describe original work, and be 20 double-spaced pages (5,000 words) or less in length. Synopses (5 double-spaced pages or less in length) of real-time applications, experimental results, and practical experiences in the design and development of real-time systems are also invited. The synopses should contain enough information for the program committee to understand the scope of the project and evaluate the novelty of the problem or approach. All accepted submissions will appear in the proceedings, and the Best Paper will be awarded at the symposium. Please send an electronic version (postscript file) or 5 copies of the manuscript to the program chair. A single cover paper should be included which contains: paper title, full name, affiliations, complete address, phone and fax numbers, and email addresses of the authors, as well as upto 150 words abstract. In addition, a text file containing the title and abstract should be emailed to the program chair. Professor Sang H. Son Department of Computer Science University of Virginia Charlottesville, Va 22903 email: son@cs.virginia.edu phone: (804)982-2205 IMPORTANT DATES Deadline for papers/Synopses May 1,1996 Acceptance Letters July 25,1996 Camera-Ready Papers September 15,1996 Symposium December 4-6, 1996 WORKSHOP and EXHIBITION: Workshop on Resource Allocation Problems in Multimedia Systems is being organized to be held immediately before the symposium, December 3. For more information about the workshop, contact Kevin Jeffay (jeffay@cs.unc.edu). In addition, an exhibition of hardware and software products for real-time systems will be held in conjunction with the symposium. For the exhibition, contact Doug Locke (locke@lfs.loral.com). \*------------------------------------------------------------------------*\ General Chairs: Alan Burns UK. Yann-Hang Lee, USA. Program Chair: Sang H. Son, USA. Treasure: Walt Heimerdinger, USA. Publicity Chair: Steve Liu, USA. Industrial Chair: Doug Locke, USA. Local Arrangements Chair: Richard Gerber, USA. Ex-Officio: Al Mok, USA. Program Committee: Azer Bestavros, USA. Richard Gerber, USA. Ching-Chih Han, USA. Hans Hansson, Sweden. Jennifer Hou, USA. Farnam Jahanian, USA. Mathai Joseph, UK. Dilip Kandlur, USA. Hermann Kopetz, Austria. Insup Lee, USA. John Lehoczky, USA. Jorg Liebeherr, USA. Kwei-Jay Lin, USA. Jane Liu, USA. Doug Locke,USA. Keith Marzullo, USA. Raj Rajkumar, USA. Karsten Schwan, USA. Alan Shaw, USA. Heonshik Shin, Korea. Kang Shin, USA. Jack Stankovic, USA. Kenji Toda, Japan. Farn Wang, Taiwan. Vic Wolfe, USA. Hui Zhang, USA. RTSS'96 WWW page at http://cs-www.bu.edu/pub/ieee-rts/rtss96/ ------------------------------------------------------------------------------ Message 2; Postmarked Mon Mar 18 19:52:28 1996 From: oulusoy@cs.bilkent.edu.tr (Ozgur Ulusoy) Subject: Special Issue on REAL-TIME DATABASE SYSTEMS Content-Length: 974 INFORMATION SYSTEMS Journal Special Issue on REAL-TIME DATABASE SYSTEMS Volume 21, Issue: 1, March 1996 CONTENTS pp. 1-2 Guest Editorial: Real-time database systems P O'NEIL, O ULUSOY pp. 3-28 Integrating standard transactions in firm real-time database systems S THOMAS, S SESHADRI, JR HARITSA pp. 29-54 Multiclass transaction scheduling and overload management in firm real-time database system A DATTA, S MUKHERJEE, P KONANA, IR VIGUIER, A BAJAJ pp. 55-74 Implementation of a real-time database system RFM ARANHA, V GANTI, S NARAYANAN, CR MUTHUKRISHNAN, STS PRASAD, K RAMAMRITHAM pp. 75-101 Value-cognizant speeculative concurrency control for real-time databases A BESTAVROS, S BRAOUDAKIS pp. 103-124 Effects of deadline propagation on scheduling nested transactions in distributed real-time database systems Y-W CHEN, L GRUENWALD ------------------------------------------------------------------------------ Message 3; Postmarked Mon Apr 1 09:37:11 1996 Subject: PhD thesis available on Randomized Distributed Real-Time Systems From: segala@cs.unibo.it (Roberto Segala) Content-Length: 5006 My PhD thesis is now available from MIT as technical report number MIT/LCS/TR-676. Ftp instructions follow after the abstract. Modeling and Verification of Randomized Distributed Real-Time Systems. Abstract: Randomization is an exceptional tool for the design of distributed algorithms, sometimes yielding efficient solutions to problems that are inherently complex, or even unsolvable, in the setting of deterministic algorithms. However, this tool has a price: even simple randomized algorithms can be extremely hard to verify and analyze. This thesis addresses the problem of verification of randomized distributed algorithms. We consider the problem both from the theoretical and the practical perspective. Our theoretical work builds a new mathematical model of randomized distributed computation; our practical work develops techniques to be used for the actual verification of randomized systems. Our analysis involves both untimed and timed systems, so that real-time properties can be investigated. Our model for randomized distributed computation is an extension of labeled transition systems. A probabilistic automaton is a state machine with transitions, where, unlike for labeled transition systems, a transition from a state leads to a discrete probability distribution over pairs consisting of a label and a state, rather than to a single label and a single state. A probabilistic automaton contains pure nondeterministic behavior since from each state there can be several transitions, and probabilistic behavior since once a transition is chosen the label that occurs and the state that is reached are determined by a probability distribution. The resolution of pure nondeterminism leads to probabilistic executions, which are Markov chain like structures. Once the pure nondeterminism is resolved, the probabilistic behavior of a probabilistic automaton can be studied. The properties of a randomized algorithm are stated in terms of satisfying some other property with a minimal or maximal probability no matter how the nondeterminism is resolved. In stating the properties of an algorithm we also account for the possibility of imposing restrictions on the ways in which the nondeterminism is resolved (e.g., fair scheduling, oblivious scheduling,...). We develop techniques to prove the correctness of some property by reducing the problem to the verification of properties of non-randomized systems. One technique is based on coin lemmas, which state lower bounds on the probability that some chosen random draws give some chosen outcomes no matter how the nondeterminism is resolved. We identify a collection of progress statements which can be used to prove upper bounds to the expected running time of an algorithm. The methods are applied to prove that the randomized dining philosophers algorithm of Lehmann and Rabin guarantees progress in expected constant time and that the randomized algorithm for agreement of Ben-Or guarantees agreement in expected exponential time. To ensure that our new model has strong mathematical foundations, we extend some of the common semantics for labeled transition systems to the probabilistic framework. We define a compositional trace semantics where a trace is replaced by a probability distribution over traces, called a trace distribution, and we extend the classical bisimulation and simulation relations in both their strong and weak version. Furthermore, we define probabilistic forward simulations, where a state is related to a probability distribution over states. All the simulation relations are shown to be sound for the trace distribution semantics. In summary, we obtain a framework that accounts for the classical theoretical results of concurrent systems and that at the same time proves to be suitable for the actual verification of randomized distributed real-time systems. This double feature should lead eventually to the easy extension of several verification techniques that are currently available for non-randomized distributed systems, thus rendering the analysis of randomized systems easier and more reliable. ------------------------ It is possible to obtain a copy of the thesis either from Bologna or from MIT, depending on which node is closer, by reading one of my URL addresses cs.unibo.it/~segala theory.lcs.mit.edu/~segala >From my URL addresses it is possible as well to get just the table of contents. Alternatively, it is possible to ftp the thesis as follows. >From Bologna: ftp cs.unibo.it login: anonymous password: [email address] cd pub/segala binary get phd.tar bye >From MIT: ftp theory.lcs.mit.edu login: anonymous password: [email address] cd pub/tds binary get TR-676.tar.gz bye The tar file contains 4 poscript files, three of which are the actual thesis. The fourth file is tha table of contents. Each file is less than 1Mb in size. ------------------------------------------------------------------------------ Message 4; Postmarked Mon Mar 11 02:33:55 1996 From: cpg@cs.utexas.edu (Carlos Puchol) Subject: TempEst v1.2 is now available Content-Length: 1492 The TempEst Program Verification Toolset Version 1.2, March 11, 1996 =============================== WHAT =============================== This is the second public release of the TempEst verification package. A toolset for the formal verification of safety properties of the text of programs written in the Esterel programming language. The safety properties are expressed in temporal logic (propositional linear time temporal logic). ============================ WHAT'S NEW ============================ Major new features for this version: Support for bounded-fairness properties - properties that involve the use of one-shot system timers (i.e. real-time alarms, operating system alarms, ...). You can now check Esterel programs that contain real-time alarms. Proper support for the newer file versions of automata that the Esterel compiler generates, with enhanced error trace reporting and better handling of large automata. ============================== WHERE =============================== The URL for the homepage of the toolset is at http://www.cs.utexas.edu/users/cpg/TempEst ============================= COPYRIGHT ============================== (C) Bell Laboratories and University of Texas Check the file LICENSE in the distribution for details. ====================================================================== Enjoy! Comments/gripes welcome. -- Carlos Puchol -- cpg@cs.utexas.edu ------------------------------------------------------------------------------ Message 5; Postmarked Wed Apr 3 17:22:39 1996 From: heitmeye@itd.nrl.navy.mil (Connie Heitmeyer) Subject: New Book: Formal Methods for Real-Time Computing Content-Length: 5223 Constance Heitmeyer and Dino Mandrioli, editors. Formal Methods for Real-Time Computing. ------ ------- --- --------- --------- John Wiley & Sons, Chicester, England, 1996. The objective of this book, which is addressed to the developers of real-time systems, is to introduce a number of formal approaches that should prove useful in building industrial-strength real-time systems. The book should also be helpful to graduate students and others who seek a comprehensive understanding of how real-time systems can be developed using formal specification notations and formal analysis techiques. However, the book is not a general textbook on real-time systems: It stresses formal approaches, omitting other important topics in the real-time computing literature, such as scheduling and resource management. The book presents some of the most promising and relevant ideas in formal methods for real-time computing. In inviting and selecting prospective contributors, our goal was to provide a fairly complete and balanced view of the state of the art. The ten chapters are organized as follows. . Chapter 1 introduces the topic of formal methods for real-time computing and provides an overview of all of the major approaches (graphical notations, state-machine and logic languages, process algebras, model-theoretic and proof-theoretic techniques). The book contains contributions representing each of the major approaches. . Chapters 2 through 4 describe approaches based on state machines. In some cases, these are strictly finite state machines, whereas, in other cases, the approach handles infinite state spaces as well. In all cases, the focus is on how one can use formal analysis to rigorously analyze a real-time system's properties, a major motivation for using formal approaches. . Chapter 5 introduces the Duration Calculus, a logic-based approach aimed at describing real-time sytems and their properties with logic formulas. In this approach, the focus is on the duration of given conditions (e.g., system states). . Chapter 6 introduces a ``dual language approach'': A timed version of Petri nets is used to describe the operational behavior of a given real-time system, and a logic language is used to specify and to reason about the system properties. . Chapters 7 and 8 introduce two approaches based on process algebra, an algebraic formalism inspired by Milner's Calculus of Communicating Systems (CCS) and Hoare's Communicating Sequential Processes (CSP). . Chapter 9 introduces symbolic model checking, a practical technique for analyzing state machine models, which checks all possible states of the model for violations of a property of interest. . Finally, Chapter 10 presents a methodology for designing a real-time system as a collection of tasks, which together guarantee some given constraints. Some of the approaches presented are promising intellectual work, whereas others have already been applied in industry, although mostly in an experimental way. In all cases, however, the presentation is tutorial in style and avoids excessive technical detail. Our objective is to provide a general, easy to understand introduction to each approach in the hope of generating the reader's interest. For each approach, many additional references are provided so that interested readers can delve further into the subject matter. The chapter titles and authors are listed below: 1. "Formal methods for specifying and analyzing real-time systems: An overview," Constance Heitmeyer (Naval Research Lab) and Dino Mandrioli (Politecnico di Milano) 2. "Specification and analysis of real-time systems: Modechart language and toolset," Aloysius Mok, Douglas Stuart (Univ. of Texas), and Farnam Jahanian (Univ. of Michigan) 3. "Automata-theoretic verification of real-time systems," Rajiv Alur (Bell Laboratories) and David Dill (Stanford Univ.) 4. "Formal verification of real-time systems using timed automata," Constance Heitmeyer (Naval Research Lab) and Nancy Lynch (MIT) 5. "Refining system requirements to program specifications," Ernst-Rudiger Olderog, Anders P. Ravn, and Jens U. Skakkebaek 6. "A Petri net and logic approach to thespecification and analysis of real-time systems," Dino Mandrioli, Angelo Morzenti, Mauro Pezze, Pierluigi SanPietro, and Sergio Silva (Politecnico di Milano) 7. "A process algebraic approach and methodology to the specification and analysis of resource-bound real-time systems," Insup Lee, Hanene Ben Abdallah, Jin-Young Choi, and Duncan Clarke (Univ. of Pennsylvania) 8. "Constraint-oriented specification style for time-dependent behaviors," Tommaso Bolognesi 9. "Analysis of real-time systems using symbolic techniques," Sergio Campos, Edmund Clarke, and Marius Minea (Carnegie-Mellon Univ.) 10. "End-to-end design of real-time systems," Richard Gerber, Seongsoo Hong, Dong-In Kang, and Manas Saksena FOR ABSTRACTS OF THE INDIVIDUAL CHAPTERS AND FOR ORDERING INFORMATION, SEE OUR WWW PAGE AT http://www.itd.nrl.navy.mil/ITD/5540/books/realtime/overview.html ------------------------------------------------------------------------------ Message 6; Postmarked Tue Apr 16 15:50:40 1996 From: joanne@theory.lcs.mit.edu (Joanne Talbot) Subject: A new book announcement: Distributed Algorithms by Nancy Lynch Content-Length: 289 NEW BOOK ANNOUNCEMENT DISTRIBUTED ALGORITHMS Nancy Lynch, MIT This book is now available from Morgan Kaufmann publishers. If you are interested, you can contact the publisher at mkp@mkp.com, or take a look at the book description at URL http://theory.lcs.mit.edu/tds/distalgs.html. ------------------------------------------------------------------------------ Message 7; Postmarked Tue Jan 30 15:44:36 1996 From: son@bbibbi.cs.virginia.edu Subject: Postdoctoral Research Position at University of Virginia Content-Length: 1901 POSTDOCTORAL RESEARCH POSITION ON PREDICTABILITY AND SCHEDULING IN REAL-TIME DATABASE SYSTEMS University of Virginia Department of Computing Science Charlottesville, VA 22903 The Real-time Systems Research Group of the University of Virginia is looking for a research associate for a research project on predictable transaction processing. The objective of the project is to design and develop a transaction model and processing schemes for active real-time database systems and extend the existing RTDB system to support predictability and temporal consistency. As such, it encompasses the fields of (a) real-time scheduling, (b) database management, and (c) operating systems. We are seeking one research associate with special expertise in real-time database systems and/or scheduling to join our team. Appointment will initially be for one year, renewable based on performance and availability of funds. We are especially interested in individuals with the following qualifications: * A Ph.D. degree (or in the last stages of obtaining it) in computer science * Preferably prior research on real-time systems with particular emphasis on real-time data management and scheduling * Ability to work in a team environment interacting with graduate students on a daily basis. Unfortunately, the position does require U.S. citizenship. For more information on the projects, please see our WWW page: http://www.cs.virginia.edu/~son/. Interested candidates should send a vita, names of four references and reprints of published papers that are related to the project topic to: Prof. Sang H. Son Department of Computing Science University of Virginia Charlottesville, VA 22903 USA Fax: 804-982-2214 Email: son@cs.virginia.edu The starting date is open to discussion, however we would like to have someone in place no later than June 1, 1996. ------------------------------------------------------------------------------ Message 8; Postmarked Mon Mar 4 09:44:36 1996 Subject: Post Doc Position at the University of Waterloo From: sleue@swen.uwaterloo.ca (Stefan Leue) Content-Length: 2557 Post-Doc Position in Software Engineering Applications are invited for a one-year definite term Post-Doc position at the Department of Electrical and Computer Engineering of the University of Waterloo. The research of the candidate to fill the position should address the general area of graphical and visual specification methods in the context of object-oriented analysis and design methods for concurrent real-time systems. Candidates should have research experience and/or interest in most of the following areas: + Formal specification techniques for concurrent distributed systems. + Object-Oriented Software Engineering. + Visual specification techniques, in particular Message Sequence Charts. + CASE tools. + Specification of real-time requirements. An aptitude for programming and knowledge of C++ and/or Smalltalk are desirable. The research will be carried out in close cooperation with a leading Canadian software tool development company (ObjecTime Limited). To be considered for the position, candidates must have a PhD (or expect to receive one by the start date) in Computer Engineering, Computer Science or a closely related field, and a previous research record of high quality. The start date is flexible but preferably before July 1, 1996. Depending on the availability of funds, the position may be renewable. Interested candidates should send a cover letter, their C.V. plus names and postal as well as e-mail addresses of at least 2 references as soon as possible, preferably by e-mail, to: Stefan Leue Department of Electrical & Computer Engineering University of Waterloo Waterloo, Ontario N2L 3G1 Canada e-mail: sleue@swen.uwaterloo.ca tel.: +1 519 885 1211 or +1 519 888 4567, extension 5313 fax.: +1 519 746 3077 In accordance with Canadian immigration requirements, this advertisement is primarily directed to Canadian citizens and permanent residents. However, other applicants will be considered. This appointment is subject to the availability of funds. Further Information: The University of Waterloo is located in the Kitchener-Waterloo urban area (population appr. 300.000), some 120 km west of Toronto, in approximately equal distance from Lake Ontario, Lake Huron, Lake Erie and Georgian Bay. The Department of Electrical & Computer Engineering is one of the leading E&CE departments in Canada, with strong research activities in Software Engineering and Telecommunications. This advertisement also appears on the WWW page http://swen.uwaterloo.ca/~sleue/postdoc.html. ------------------------------------------------------------------------------ Message 9; Postmarked Fri Mar 8 03:02:33 1996 Subject: Announcement: VISITING RESEARCHER in REAL-TIME SYSTEMS From: Hans Hansson Content-Length: 1162 The Hard Real Time Systems research group at the Department of Computer Systems, University of Uppsala, Sweden, offers a position as VISITING RESEARCHER in REAL-TIME SYSTEMS The position is intended for two years. We seek applicants with a PhD, a research record and interest in one or several of the following areas: o Real-Time Scheduling (theory and practical applications) o Real-Time Networking o Execution Time Analysis o Methods for Real-Time System Software Development o Distributed Real-Time Systems o Real-Time System Analysis and Verification Additional information is available at http://www.docs.uu.se/docs/hrts/visres96.html Interested? Please send CV and state your interests and requirements by e-mail, fax or physical mail to Hans Hansson. ========================================================================== Hans Hansson E-mail: hansh@docs.uu.se tel@DoCS +46 18 183155 Dept. of Computer Systems (DoCS) switchb. +46 18 182500 P.O. Box 325 tel@home +46 18 429974 S-751 05 Uppsala fax@DoCS +46 18 550225 Sweden mobile +46 70 7527785 -------------------------------------------------------------------------- ------------------------------------------------------------------------------ Message 10; Postmarked Thu Mar 14 12:31:30 1996 From: kfwong@se.cuhk.hk (Wong Kam-Fai) Subject:16th International Conference on Distributed Computing Systems Content-Length: 7221 The 16th International Conference on Distributed Computing Systems Advance Program Hong Kong Convention and Exhibition Centre 1 Harbour Road, Wanchai, Hong Kong May 27-30, 1996 This conference brings together developers and researchers from universities, industry and government to advance the science and technology in distributed computing. Its three-day technical program encompasses three parallel sessions covering 87 papers on a broad range of subjects, 2 keynote addresses by distinguished speakers, and 2 panel sessions to stimulate discussion and interaction. TUTORIALS MAY 27 (details can be found under our web page: http://www.cs.ust.hk/ICDCS/ICDCS-Adv.html) T1: REAL-TIME SYSTEMS SPEAKER: Krithi Ramamrithm received the Ph.D. in Computer Science from the University of Utah in 1981. Since then he has been with the Department of Computer Science at the University of Massachusetts where he is currently a Professor. He is a co-director of the Real-Time Laboratory at the University of Massachusetts. He served as Program Chair for the Real-Time Systems Symposium in 1994 and as General Chair in 1995. He is an editor of the Real-Time Systems Journal and the Distributed Systems Engineering Journal. He has co-authored three IEEE tutorial texts on real-time systems. T2: HIGH-SPEED NETWORKS FOR DISTRIBUTED COMPUTING SPEAKERS: Lionel Ni is a Professor of Computer Science and director of Advanced Computer Systems Laboratory at Michigan State University. He has published over 120 technical articles in the area of parallel processing and distributed computing. Dr. Ni is an IEEE fellow and is a member of the editorial boards of IEEE Transactions on Computers and IEEE Transactions on Parallel and Distributed Systems. Currently he is serving as the Program Director of the Microelectronic Systems Architecture Program at the US National Science Foundation. Hong Xu received the Ph.D degree in computer science from Michigan State University. He is currently an engineer at Cisco Systems, Inc. Prior to that he was at the University of Southern California, where he participated in the design and implementation of the 640-Mbps switch-based ATOMIC LAN. His current research interests include high-speed network architecture and high-performance network protocol design. T3: DISTRIBUTED MULTIMEDIA INFORMATION SYSTEMS SPEAKER: Arif Ghafoor received his PhD from Columbia University in 1985. In 1991 he joined the School of Electrical Engineering at Purdue University, where he is an Associate Professor. Prior to that, he was a faculty at Syracuse University. He has published over 100 technical papers in the areas of parallel and distributed systems, and multimedia information systems. He is on the editorial boards of ACM/Springer Multimedia Systems, the Journal of Multimedia Tools and Applications, and the Journal of Distributed and Parallel Databases. T4: WIRELESS MOBILE AND PERSONAL COMMUNICATIONS SPEAKER: Justin Chuang received the PhD degree in Electrical Engineering from Michigan State University in 1983. Since then, he worked as a researcher at MSU, GE Corporate Research and Development, and at Bellcore. Since 1993, he has been a Reader at the Electrical and Electronic Engineering Department of the Hong Kong University of Science and Technology. Dr. Chuang is the editor of Wireless Access Techniques for the IEEE Transactions on Communications. He has guest-edited special issues on Wireless Personal Communications for the IEEE Journal on Selected Areas in Communications. TECHNICAL PROGRAM MAY 28 - MAY 30, 1996 87 paper presentations selected from 305 submissions in the following areas: (details can be found under our web page: http://www.cs.ust.hk/ICDCS/ICDCS-Adv.html) * Fault-tolerant Applications & Frameworks * Real-Time Synchronization & Scheduling * Distributed Shared Memory * Checkpointing & Recovering * Real-time Communications * Routing in Direct Networks * Support for Distributed Applications * Scheduling * Communication & Synchronization * Electronic Commerce, Protection & Verification * Mobile Computing I * Routing & Protocols * Distributed Objects I * Persistence * Group Communications * Interoperable Databases * Algorithms for Linguistic Support * Multicast Protocols * Distributed Objects II * Performance Analysis * Configuration Languages * Distributed Deadlock & Data Structures * Migration Strategies * Web & Internet * Transactions * Mutual Exclusion * Mobile Computing II Two keynote speeches: "From HPCC to New Millennium Computing" T.Y. Feng, National Science Foundation, USA "Distributed Computing in the Organization of the Future" Bob Johansen, Institute for the Future, U.S.A. Two panel discussions: "Impact of Technologies on Distributed Computing" Chair: Domenico Ferrari, Universita` Cattolica, Piacenza, Italy "How Will Distributed Object Standards Impact the Distributed Computing Systems of the Future ?" Chair: Richard Soley, Object Management Group, USA Social events: Reception (held in conjunction with President's Reception) - May 28 Boat Cruise and Banquet - May 29 ORGANIZING AND PROGRAM COMMITTEES General co-chairs Mario Barbacci, Software Engineering Institute, CMU, USA Vincent Shen, Hong Kong University of Science & Technology, Hong Kong Program Co-chairs Bill Buckles, Tulane University, USA Samuel Chanson, Hong Kong University of Science & Technology, Hong Kong Distributed Operating Systems Vice Chair Mukesh Singhal, Ohio State University, USA Distributed Databases and Information Systems Vice Chair Tamer Ozsu, University of Alberta, Canada Communication Protocols Vice Chair Teruo Higashino, Osaka University, Japan Distributed Real-Time Systems Vice Chair Farnam Jahanian, University of Michigan, USA Languages, Tools and Software Engineering Vice Chair Jeffrey Kramer, Imperial College, UK Computer Architecture and Interconnection Vice Chair Lionel Ni, Michigan State University, USA Fault Tolerance, Availability and Security Vice Chair Graham D. Parrington, University of Newcastle upon Tyne, UK Distributed Resource Management and Scheduling Vice Chair Richard D. Schlichting, University of Arizona, USA Performance of Distributed Systems Vice Chair Erol Gelenbe, Duke University, USA Mobile Computing Vice Chair Hamid Ahmadi, IBM T.J. Watson Research Center, USA Distributed Algorithms and Applications Vice Chair Nicola Santoro, Carleton University, Canada Tutorial Chair Babak Hamidzadeh, Hong Kong University of Science & Technology, Hong Kong Awards Chair Benjamin Wah, University of Illinois, USA International Liaison Chair Mounir Hamdi, Hong Kong University of Science & Technology, Hong Kong Local Arrangement Chair Francis Lau, University of Hong Kong, Hong Kong Exhibitions Chair Chin Lu, The Chinese University of Hong Kong, Hong Kong Treasurer N.V. Balasubramanian, City University of Hong Kong, Hong Kong TC on Distributed Processing Chair Joseph E. Urban, Arizona State University, USA Steering Committee Chair Ming T. (Mike) Liu, Ohio State University, USA --------------- Web page: http://www.cs.ust.hk/ICDCS/ICDCS-Adv.html ------------------------------------------------------------------------------ Message 11; Postmarked Mon Mar 25 22:32:29 1996 From: Time-96 Workshop Subject: TIME-96 Preliminary PROGRAM Content-Length: 6731 TIME-96: Third International Workshop on Temporal Representation and Reasoning Key West, Florida, USA May 19-20, 1996 PRELIMINARY PROGRAM The purpose of this workshop is to bring together active researchers in the area of temporal representation and reasoning in Artificial Intelligence. Through paper presentations and discussions, the participants will exchange, compare, and contrast results in the area. The workshop is organized as a two day event in conjunction with FLAIRS-96 (Ninth Annual Florida Artificial Intelligence Research Symposium, May 20-22). The Proceedings of the Workshop will be published by IEEE Computer Society Press and will be available at the Workshop. For further information, the TIME-96 e-mail address is time96@dimi.uniud.it The TIME workshop series has a web page at: http://www.seas.smu.edu/~mario/time-workshop/welcome.html SPONSORING ORGANIZATIONS University of Regina, Canada University of Udine, Italy Florida Artificial Intelligence Research Society (FLAIRS) ORGANIZATION GENERAL Chairs: Scott Goodwin and Howard Hamilton University of Regina, Canada PROGRAM COMMITTEE Chairs: Luca Chittaro and Angelo Montanari Universita' di Udine, Italy PROGRAM COMMITTEE Frank Anger, University of West Florida, USA Fahiem Bacchus, University of Waterloo, Canada Mark Boddy, Honeywell Systems and Research Center, USA Luca Chittaro (co-chair), Universita' di Udine, Italy Jan Chomicki, Kansas State University, USA Philippe Dague, Universite Paris-Nord, France Tom Dean, Brown University, USA Mark Denecker, K. University Leuven, Belgium Jennifer Elgot-Drapkin, Arizona State University, USA Marcelo Finger, Universidade de Sao Paulo, Brasil Michael Fisher, Manchester Metropolitan University, UK Dov Gabbay, Imperial College, UK Malik Ghallab, LAAS-CNRS, France Anthony Galton, University of Exeter, UK Michael Gelfond, University of El Paso, USA Michael Georgeff, Australian AI Institute, Australia Peter Haddawy, University of Wisconsin-Milwaukee, USA Pat Hayes, University of Illinois at Urbana-Champaign, USA Peter Ladkin, Universitaet Bielefeld, Germany Gerard Ligozat, Universite Paris XI, France Angelo Montanari (co-chair), Universita' di Udine, Italy Robert Morris, Florida Institute of Technology, USA Bernhard Nebel, Universitaet des Saarlandes, Germany Don Perlis, University of Maryland, USA Han Reichgelt, University of the West Indies, Jamaica Raymond Reiter, University of Toronto, Canada Mark Reynolds, Kings College, UK Maarten de Rijke, University of Warwick, UK Erik Sandewall, Linkoping University, Sweden Marek Sergot, Imperial College, UK Murray Shanahan, Imperial College, UK Peter van Beek, University of Alberta, Canada Andre Trudel, Acadia University, Canada ORGANIZING COMMITTEE Peter Haddawy, University of Wisconsin-Milwaukee Robert Morris, Florida Institute of Technology Andre Trudel, Acadia University Peter van Beek, University of Alberta ************************ PRELIMINARY PROGRAM ********************* Sunday, May 19th 9:00 Opening addresses 9:30 INVITED TALK I: J. van Benthen Remodeling temporal geometry 10:30 Break 11:00 TEMPORAL CONSTRAINTS R. Dechter, E. Schwalb Processing Temporal Constraint Networks R. Wetprasit, A. Sattar, L. Khatib Reasoning with Sequences of Point Events 12:00 TEMPORAL REASONING AND LOGIC PROGRAMMING C. Dixon Temporal Resolution: A Breadth-First Search Approach E. Lamma, P. Mello, M. Milano Temporal Reasoning in a Meta Constraint Logic Programming Architecture 13:00 Lunch 14:30 TIME IN PROBLEM SOLVING I. Bichindaritz, E. Conlon Case-based reasoning with temporal data G. Brajnik, D.J. Clancy Guiding and refining simulation using temporal logic E.T. Keravnou Engineering time in medical knowledge-based systems through time-axes and time-objects 16:00 PLENARY PRESENTATION OF POSTERS, and POSTER SESSION (see below) 17:00 TEMPORAL DATABASES C. Bettini, X.S. Wang, S. Jaiodia A General Framework and Reasoning Model for Time Granularity A. Gal, D. Dori Combining Simultaneous Values and Temporal Data Dependencies M. A. Orgun A recursive temporal algebra and temporal completeness Monday, May 20th 9:00 INVITED TALK II: F. Bacchus Utilizing temporal logics in planning 10:00 POSTER SESSION (see below) 10:30 REASONING ABOUT ACTIONS AND EVENTS A. Mohktari, D. Kayser Time in causal theory L. Vila, E. Schwalb A Theory of Time and Temporal Incidence based on Instants and Periods C.H. Yi Reasoning about Concurrent Actions within Features and Fluents 12:00 Lunch 13:30 TIME GRANULARITY AND ABSTRACTION D. Cukierman, J. Delgrande Characterizing Temporal Repetition E. Mota, D. Robertson Representing Interaction of Agents at Different Time Granularities Y. Shahar Dynamic temporal interpretation contexts for temporal abstraction 15:00 APPLICATIONS M. Li, Y. Sun, H. Sheng Temporal representation for multimedia systems 15:30 POSTER SESSION (see below) 16:00 TEMPORAL LOGICS G. Becher First Order Modal Logics with Generalized Intervals A. Trudel, D. Gagne A topological transition based logic for the qualitative motion of objects 17:00 BELIEF AND UNCERTAINTY IN TEMPORAL KNOWLEDGE A.Y. Tawfik, E. Neufeld Irrelevance in Uncertain Temporal Reasoning 17:30 Closing Remarks POSTER PRESENTATIONS: S. Badaloni, M. Berati Combining heterogeneous temporal information A. Cesta, A. Oddi Gaining Efficiency and Flexibility in the Simple Temporal Problem C. Combi, F. Pinciroli, G. Pozzi Managing Time granularity of narrative clinical information: the Temporal Data model TIME-NESIS A. Fusaoka Nonmonotonic reasoning on a constructive time structure R. Guillen, D. Farwell, J. Wiebe Handling temporal relations in scheduling dialogues for an MT system A. Isli, H. Bennaceur Networks of qualitative interval relations: combining circuit consistency and path consistency in the search for a solution K.P. Jantke and A. Arnold A Modal Temporal Logic and its Models underlying Variants of Planning Algorithms C. Martin, J. Sistac An Integrity Constraint Checking Method for Temporal Deductive Databases M.R. Sanchez and A.M. Shende Time Accountability for Lattice Computers E. Schwalb, L. Vila Non-reified temporal reasoning with temporal constraints More information available at: http://www.seas.smu.edu/~mario/time-workshop/welcome.html ------------------------------------------------------------------------------ Message 12; Postmarked Sat Mar 30 09:17:15 1996 From: iceccs96@homer.njit.edu (iceccs '96) Subject: RTAW96 Call for Papers Content-Length: 3598 Fourth Annual IEEE Workshop on Real-Time Applications Montreal Bonaventure Hilton Montreal, Quebec, Canada October 21-25, 1996 Description: This workshop (RTAW '96), run in conjunction with the annual Complex Systems Engineering Synthesis and Assessment Technology Workshop (CSESAW '96) and the Second IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '96), is the fourth in its series. The workshop is intended for industrial and government engineers and scientists, and for academic researchers involved with real- time technology and applications. We anticipate a wide range of presentations, panels and discussions, aimed at bridging the knowledge gap between practitioners and researchers, at fostering better links between the communities, and at ultimately bringing about a better understanding of problems related to transfer of existing technology. Areas of interest include, but are not limited to, data acquisition, C3I, complex systems engineering, domain specific methodology, medical, process control, manufacturing, energy, aerospace, petro-chemical, telecommunications, and pharmaceutical. Workshop Co-Chairs: Ling Guan, University of Sydney Jose Salinas, Naval Undersea Warfare Center Jacques Skubich, Institut National des Sciences Appliquees de Lyon Program Committee: Thomas Choinski, Naval Undersea Warfare Center, New London Alfons Crespo, Universidad Politecnica Valencia Vincent David, Centre d'Etudes Atomiques de Saclay Gunter Hommel, TU Berlin Daniel Juttelstad, Naval Undersea Warfare Center, Newport Abd-El-Kader Sahraoui, LAAS - CNRS Phillip Laplante, New Jersey Institute of Technology/BCC S H Leung, City University of Hong Kong David Levy, University of Sydney Shaoying Liu, Hiroshima City University Fabrizio Lombardi, Texas A&M University Tomasz Szmuc, Academy of Mining and Metallurgy Cracow Theodor Tempelmeiner, FachHochschule Rosenheim Wilson Wen, Telstra Research Laboratories General Chair: Alexander Stoyenko, New Jersey Institute of Technology Submissions and Presentations: Presenters will be chosen on the basis of position papers. Each position paper should be 1 to 5 pages long, and will (1) clearly specify the problem with respect to the application environment, requirements, and external process characteristics, (2) present the solutions, and (3) discuss unsolved problems. All submissions should be made, in five copies, by April 22, 1996 to one of the following: The Americas: Europe & Africa: Jose Salinas Jacques Skubich Code 2153, Bldg 80 L3I - INSA Naval Undersea Warfare Center Batiment 502 New London, CT 06320 20 Avenue Albert Einstein USA 69621 Villeurbanne Cedex FRANCE Tel: (860) 440 - 4755 Tel: (+33) 72 43 84 86 Fax: (860) 440 - 5987 Fax: (+33) 72 43 85 18 salinas@starbase.nl.nuwc.navy.mil Jacques.Skubich@if.insa-lyon.fr Asia & Oceania: Ling Guan Department of Electrical Engineering University of Sydney NSW 2006 AUSTRALIA Tel: (612) 93 51 21 54 Fax: (612) 93 51 38 47 ling@ee.su.oz.au Deadline for notification of acceptance will be made by June 17, 1996 Sponsored by: IEEE TC on Complexity in Computing In Cooperation with: IEEE TC on Real-Time Systems With much appreciated support from: Honeywell Naval Surface Warfare Center Office of Naval Research Real-Time Computing Laboratory at NJIT Institute for Systems Integration at NJIT ------------------------------------------------------------------------------ Message 13; Postmarked Mon Apr 1 12:52:15 1996 Subject: AMAST'96: Call for Participation From: Bernhard Reus Content-Length: 1314 -------------------------------------------------------------------- A word-wide-web page containing information about the conference is reachable by URL: http://www.pst.informatik.uni-muenchen.de/amast96 . e-mail: amast96-info@informatik.uni-muenchen.de -------------------------------------------------------------------- ********************************************* ******************************************* FIFTH INTERNATIONAL CONFERENCE ON ALGEBRAIC METHODOLOGY AND SOFTWARE TECHNOLOGY AMAST '96 ******************************************* ********************************************* July 1-5, 1996 Munich, Germany Sponsored by Deutsche Forschungsgemeinschaft M"unchener Universit"atsgesellschaft s d & m Siemens Organized by Ludwig-Maximilians-Universit"at M"unchen ------------------------------------------------------------------------------ Message 14; Postmarked Fri Apr 5 17:43:09 1996 From: srivas Subject: FMCAD'96: Call for Papers Content-Length: 6216 +-------------------------------------------------------+ | | | CALL FOR PAPERS | | | | The International Conference on | | | | Formal Methods in Computer-Aided Design: | | (FMCAD -- Successor to TPCD) | | | | Palo Alto, CA, USA | | 6 - 8. November 1996 | | | | In Cooperation with IFIP WG 10.5 | | CO-SPONSORED BY | | Texas Instruments, Hewlett-Packard Company, | | Cadence Berkeley Labs, Synopsys Inc., and | | LSI Logic Corporation | | | +-------------------------------------------------------+ FOCUS AND OBJECTIVES ==================== International Conference on Formal Methods in Computer-Aided Design '96 (FMCAD '96) is a forum for presenting state-of-the-art tools and techniques based on formal methods for computer-aided design of hardware. The location and the industrial sponsorship of the conference provide a unique opportunity for researchers in the field to interact with engineers from the Silicon Valley semiconductor and CAD companies. The objective is to cover all relevant formal aspects of work in computer-aided system design including verification, synthesis and testing. A special focus of this conference will be on the integration of complementary techniques and tools. The conference, will cover original research in this area, as well as case studies, technology transfer, and other practical experiments. It is intended to publish the Proceedings in time for distribution at the conference in the Springer LNCS series. Specific technical areas of FMCAD '96 include, but are not limited to: * New hardware verification techniques based on theorem proving, state exploration, model-checking, and BDDs * Correct by construction approaches to hardware design, such as synthesis and transformation * Hybrid approaches that integrate synthesis and verification or different verification techniques * Integration of formal methods with CAD tools, such as synthesis, simulation, and design exploration * Formal verification techniques for hardware description languages, such as VHDL, Verilog * Case studies and application of formal methods in industry This conference is a sequel in a series of IFIP WG 10.2/10.5 sponsored conferences with similar themes that have been most recently held in 1992 and 1994 under the banner ``Theorem Provers In Circuit Design.'' The intended audience includes workers in the field of hardware verification and synthesis as well as practising digital designers with an interest in formal methods. The conference will include contributed research papers, invited talks, tutorials, and tool demonstrations. INVITED SPEAKERS ================ (1) David Dill, Stanford University, USA (2) Kurt Keutzer, Synopsys Inc., USA (3) J S. Moore, Computational Logic Inc., USA PAPERS: 15 page, 11-point limit with abstract, containing original research in sufficient detail to assess its merits and relevance. Simultaneous submission to other conferences or journals and submission of previously published material are not allowed. TUTORIALS: 4 page abstract, 15 page, 11-point for final. We encourage presentations of tools on a suitable set of completely worked out examples. Submit in electronically self-contained Postscript to: fmcad96@csl.sri.com. Email submission is strongly encouraged for speeding up the reviewing process. When this is not possible, send seven hard-copies to: PAPERS TUTORIALS -------------- -------------- Mandayam Srivas Albert Camilleri Re: FMCAD '96 Re: FMCAD '96 SRI International (EL-262) HEWLETT-PACKARD COMPANY M/S 5596 333 Ravenswood Avenue 8000 FOOTHILLS BOULEVARD Menlo Park, CA 94025, USA ROSEVILLE CA 95747-5596, USA Email: srivas@csl.sri.com Email: ac@hprpcd.rose.hp.com Tel: +1 415-859-6136 Tel : +1 916 785 8488 Fax: +1 415-859-2844 Fax : +1 916 785 3096 Please direct all paper and program inquiries to fmcad96@csl.sri.com. Registration questions may be directed to vijay@lsil.com. For more information see our World Wide Web home page at http://www.csl.sri.com/FMCAD96. IMPORTANT DATES: Submission deadline: April 15, 1996 Notification of acceptance: June 17, 1996 Proceedings version of accepted papers due: July 15, 1996 ORGANIZERS: Program Chair: Mandayam Srivas, SRI International, USA Tutorials Chair: Albert Camilleri, Hewlett Packard Company, USA Registration Chair: Vijay Nagasamy, LSI Logic Inc., USA PROGRAM COMMITTEE: D. Borrione (TIMA, France) R. Brayton (University of California, Berkeley, USA) R. Bryant (CMU, USA) R. Camposano (Synopsys Inc., USA) L. Claesen (IMEC, Belgium) E. Clarke (CMU, USA) C. Delgado Kloos (Universidad Politecnica de Madrid, Spain) M. Fujita (Fujitsu Labs, USA) S. German (IBM, Yorktown Heights, USA) M. Gordon (University of Cambridge, UK) O. Grumberg (Technion, Haifa, Israel) W. Hunt (Computational Logic, Inc., USA) S. Johnson (University of Indiana, USA) R. Kumar (FZI, Karlsruhe, Germany) M. Leeser (Northeastern University, USA) P. Loewenstein (Sun Microsystems, USA) K. McMillan (Cadence Berkeley Lab, USA) C. Seger (Intel, Oregon, USA) J. Staunstrup (Technical University, Denmark) V. Stavridou (Queen Mary and Westfield College, UK) P.A. Subrahmanyam (AT&T, USA) J. Van Tassel (Texas Instruments, USA) ------------------------------------------------------------------------------ Message 15; Postmarked Wed Feb 28 15:50:21 1996 From: mvac@rc.bel.alcatel.be Subject: CN3 Call for Participation Content-Length: 3456 Call for Participation +---------------------------------+ | 3rd International Workshop on | | Community Networking | | | | "Stories behind the Picture" | +---------------------------------+ May 23-24, 1996 Park Lane Hotel, Antwerpen, Belgium Sponsored by the IEEE Communications Society Sponsored by Alcatel Telecom Supported by the European Commission OBJECTIVES AND SCOPE -------------------- New services such as Video-on-Demand, teleshopping, teleworking and edutainment are being (or will soon be) introduced in communication networks. They will bring a variety of new applications to the user's home, and change the social and economic behavior of the -possibly virtual- communities they are living, working and communicating in. Experiences to date show that interactive service networks are primarily attractive to users, because they allow on-line communities to develop and flourish. The success of network technology, infrastructure and of the services deployed is therefore strongly determined by their potential for supporting communities. Continuously growing user access to and exchange of an overwhelming amount of information, provided by e.g. the World Wide Web and other on-line services, not only introduces the need for appropriate network architectures and infrastructure, but also for creatively packaged content and well designed navigation tools. This in turn, stimulates the user's desire to actively participate in newly emerging electronic communities. This workshop will give researchers and professionals from a variety of disciplines the opportunity to exchange their views and experiences, and advance the state of the art in the field. The 3rd edition's theme, "Stories behind the Picture", emphasizes the market's need for a clear vision on technology and services evolution, and care for real customer requirements (see also the Advance Program). ENQUIRIES --------- All information on the workshop is available via the CNW Web Pages : http://www.bip.be/cn3 For all enquiries, send an electronic mail to : cn3@rc.bel.alcatel.be Program chair : Marc Jadoul Alcatel Telecom Fr. Wellesplein 1 2018 Antwerpen, Belgium Phone : +32 3 240 8216 Fax : +32 3 240 9932 Email : jadoulm@btmaa.bel.alcatel.be Organizing chair : Michel Van Ackere Alcatel Telecom Fr. Wellesplein 2018 Antwerpen, Belgium Phone : +32 3 240 8216 Fax : +32 3 240 9932 email : ackerem@btmaa.bel.alcatel.be Program Committee : Jürgen Brommelhoff, Digital Equipment Corporation Wim Delbare, Belgacom Jeff H. Derby, IBM Corporation Skjold Fink, Tele Danmark Alexander D. Gelman, Bellcore Riccardo Gusella, Hewlett-Packard Laboratories Gordon Kerr, BT Labs Jan Lamers, Belgium Online John Limb, Georgia Tech Andrew Lippman, MIT Media lab Tetsuya Miki, The University of Electro-Communications Tokyo Martin De Prycker, Alcatel Telecom David Skellern, Macquarie University Sydney Mario P. Vecchi, Time Warner Cable, Inc Bart Voeten, National Computer Board, Singapore William E. Wall, Scientific-Atlanta, Inc Joel Winthrop, AT&T Bell Labs ------------------------------------------------------------------------------ <<<<<<<<<<<<<<<<<<<* END OF THE IEEE-CS TC-RTS NEWSLETTER *>>>>>>>>>>>>>>>>>>> ------------------------------------------------------------------------------ The TC-RTS repository is maintained by Azer Bestavros at Boston University WWW Home Page of the TC-RTS is at: http://cs-www.bu.edu/pub/ieee-rts/Home.html Internet address for anonymous FTP to the TC-RTS repository is: cs-ftp.bu.edu Contributions to this forum should be sent via E-mail to: IEEE-RTTC@cs.bu.edu Requests / inquiries should be sent via E-mail to: IEEE-RTTC-request@cs.bu.edu ------------------------------------------------------------------------------